Senior EDA Physical Design (PnR) Engineer

Role Summary

We are seeking a highly motivated Senior EDA Physical Design Engineer with 3 to 8 years of industry experience to develop, deploy, and support advanced physical implementation methodologies for semiconductor designs.

In this role, you will combine hands-on physical design expertise with EDA methodology development and customer-facing technical support. You will evaluate emerging EDA technologies, develop robust and scalable RTL-to-GDSII implementation flows, and help engineering teams achieve their performance, power, area, runtime, and quality objectives.

You will work in a collaborative, global environment with product engineering, EDA teams and EDA vendors. The position is suited to an engineer who enjoys solving challenging implementation problems, developing production-quality design flows, and helping engineering teams adopt effective physical design methodologies.

Key Responsibilities

Physical Design Implementation and Optimization

• Perform and support physical implementation activities, including floorplanning, power planning, placement, clock tree synthesis, routing, post-route optimization, and signoff preparation.
• Analyze and resolve complex issues related to timing closure, congestion, routing, power integrity, design-rule compliance, and implementation quality.
• Evaluate quality-of-results trade-offs across timing, power, area, routability, runtime, and design robustness.
• Support hierarchical and large-scale SoC implementation methodologies.
• Collaborate with relevant teams to achieve physical signoff readiness.

Methodology Development and Deployment

• Develop, validate, document, and deploy robust physical implementation methodologies and production-quality EDA flows.
• Create reusable flow components, scripts, checks, reporting utilities, and automation infrastructure.
• Standardize implementation procedures and reports to improve consistency across projects.
• Validate methodology changes using representative designs, regression testing, and measurable quality-of-results criteria.
• Support migration and adoption of new implementation platforms, including flow porting, validation, testing, and user onboarding.
• Apply disciplined software engineering practices, including version control, modular design, testing, release management, and technical documentation.
• Drive improvements in flow robustness, scalability, usability, runtime, and quality of results.

New Technology Evaluation and Proof of Concept

• Research and evaluate new EDA tool functions, implementation technologies, and semiconductor design methodologies.
• Define technical evaluation criteria and conduct proof-of-concept activities using representative designs.
• Compare alternative tools and approaches based on quality of results, runtime, scalability, automation, usability, and integration requirements.
• Identify technical limitations, deployment risks, and methodology improvement opportunities.
• Document findings and present recommendations to engineering, product, and technical leadership teams.
• Convert successful evaluations into repeatable, supportable, and production-ready methodologies.
• Explore AI-assisted EDA capabilities and emerging automation technologies to improve engineering productivity and design outcomes.

Cross-Functional Collaboration

• Work closely with EDA R&D vendors, product engineering, and design teams to identify requirements and resolve implementation challenges.
• Provide structured technical feedback to product and R&D teams based on project deployment and customer experience.
• Collaborate across multiple sites and time zones to share best practices and maintain consistency across projects.
• Participate in technical reviews, methodology planning, issue prioritization, and continuous-improvement initiatives.
• Communicate technical risks, trade-offs, results, and recommendations clearly to technical and non-technical stakeholders.

Customer Engagement and Technical Support

• Provide hands-on technical support to semiconductor customers and internal project teams adopting physical implementation methodologies and EDA flows.
• Investigate, reproduce, debug, and resolve complex issues related to tools, scripts, constraints, implementation methodologies, and design quality.
• Guide customers through flow setup, methodology adoption, optimization, and issue resolution.
• Deliver technical presentations, demonstrations, training materials, and implementation recommendations.
• Coordinate with product and R&D teams to escalate issues, communicate customer requirements, and track technical resolutions.
• Build trusted technical relationships through responsiveness, ownership, sound engineering judgment, and clear communication.
• Help ensure that deployed flows remain robust, scalable, and effective across multiple concurrent projects.

Education and Experience

• Bachelor's or Master's degree in Electrical Engineering, Electronic Engineering, Computer Engineering, Computer Science, Microelectronics, Semiconductor Engineering, or a related technical discipline.
• 3 to 8 years of relevant industry experience in ASIC physical design, semiconductor implementation, EDA or CAD engineering, physical implementation methodology development, or EDA applications engineering.

Technical Expertise

• Strong hands-on experience with synthesis, floorplanning, placement, clock tree synthesis, routing, timing closure, congestion mitigation, and power and area optimization.
• Practical knowledge of RTL-to-GDSII implementation and physical signoff methodologies.
• Experience with Synopsys Fusion Compiler, IC Compiler II, Cadence Innovus or equivalent physical design tools.
• Strong understanding of static timing analysis, SDC constraints, clocking strategies, and setup and hold timing closure.
• Experience optimizing performance, power, area, congestion, runtime, and overall quality of results.
• Familiarity with hierarchical SoC implementation, low-power design concepts, physical verification, and EDA flow integration.

Debugging, Automation, and Problem Solving

• Strong analytical and problem-solving skills, with the ability to diagnose complex tool, flow, constraint, and design issues.
• Proficiency in scripting and automation using Tcl, Python, or shell scripting in a Linux or Unix environment.
• Ability to develop maintainable, reusable, and well-documented flow infrastructure.
• Experience interpreting implementation reports, log files, timing reports, congestion data, and quality-of-results metrics.
• Ability to work independently, prioritize technical issues, and take ownership of deliverables through resolution.
• Demonstrated ability to learn and apply new tools, technologies, and methodologies.

Communication and Collaboration

• Strong written and verbal communication skills in English.
• Ability to explain complex implementation issues, technical trade-offs, and recommendations clearly.
• Experience working directly with customers, design teams, or EDA tool users.
• Strong presentation skills and the ability to deliver technical demonstrations, training, and methodology guidance.
• Ability to work effectively in a global, multi-site, and cross-functional engineering environment.
• Collaborative working style, customer-support mindset, and commitment to high-quality technical delivery.

Preferred Skills

• Advanced Tcl, Python, Perl, or shell scripting experience for EDA flow automation.
• Hands-on experience with RTL-to-GDSII implementation and physically-aware synthesis.
• Experience developing or optimizing integrated Synopsys Fusion Compiler flows covering synthesis, placement, clock tree synthesis, routing, and timing closure.
• Knowledge of multi-mode, multi-corner analysis, advanced-node implementation challenges, and hierarchical SoC design.
• Experience deploying or standardizing physical implementation methodologies across multiple projects.
• Familiarity wit