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Senior Analog IC Design & Verification Engineer

Neuralink · South San Francisco, CA

Spotted 4h agoFull-time

Job details

Employment
Full-time
Level
Senior
Experience
5+ years
Education
PhD
Posted
Oct 22, 2026
Last confirmed open
Oct 22, 2026
Job description

About this role

Neuralink seeks an experienced analog/mixed-signal IC engineer to design and verify CMOS circuits for high-speed brain-machine interface SoCs. Responsibilities include circuit design, layout oversight, and analog verification with a focus on noise, distortion, and power trade-offs.

The role requires a BS with 5+ years in related fields; MS/PhD is a plus. Employment offers equity (RSUs) and full-time compensation in a cutting-edge team.

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