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Intel· Spotted 1d ago

SoC Logic Design Engineer

Location
US, California, Santa Clara · US, California, Folsom · US, Oregon, Hillsboro
Pay
$105,650 – $149,150 a year
Work mode
On-site
Employment
Full-time
Level
Entry level
Education
Bachelor's degree
Job function
Software/Internet/AI

Posted Nov 9, 2026Last confirmed open Nov 11, 2026

About this role

Job Details

Job Description:

As a SoC Logic Design Engineer, you will actively contribute to the development, coding, and simulation of system-on-chip (SoC) designs. You will integrate logic from various IP blocks and subsystems into a complete chip design, ensuring power, performance, area, and timing goals are met.

Your work will directly impact the delivery of cutting-edge, high-quality SoC solutions that drive advancements in technology and innovation.

The role is part of Intel's Data Center Group (DCG), which focuses on delivering advanced solutions that enable data-centric computing for global industries. As a member of this organization, you will collaborate on projects that shape the performance, security, and efficiency of Intel's data center offerings, contributing to the broader infrastructure required for modern computing needs.

The primary responsibilities for this role will include, but are not limited to:

  • Design and implement logic for SoC blocks and subsystems using register transfer level (RTL) coding techniques.
  • Integrate IP blocks and subsystems into full chip SoC designs, ensuring seamless functionality.
  • Conduct quality checks across various aspects of logic design, from RTL coding to timing, power, and area convergence.
  • Optimize logic designs to meet power, performance, area, and timing targets.
  • Review verification plans and resolve failing RTL tests to ensure correctness of design features. - Collaborate with IP providers to integrate and validate IPs for SoC-level designs.
  • Follow secure development practices to meet security objectives and address security threats in designs.
  • Drive compliance with quality assurance standards for successful IP and SoC handoff.

Qualifications

Minimum Qualifications :

Minimum qualifications are required to be initially considered for this position.

  • Bachelor's degree in Electrical Engineering, Computer Engineering, or related field, with 0-1 years of hands-on experience in logic design gained through internships, academic projects, coursework, or hands-on training OR a Master's degree in Electrical Engineering, Computer Engineering, or related field with no prior professional experience.
  • Advanced experience in register transfer level (RTL) coding languages such as Verilog or VHDL.
  • Basic knowledge with industry-standard tools for logic design, synthesis, and simulation (e.g., Synopsys Design Compiler, Cadence Xcelium).
  • Basic knowledge of power, performance, and area optimization in SoC designs.
  • Basic knowledge of timing analysis and static timing tools.

Preferred Qualifications

Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

  • Strong analytical and problem-solving skills with attention to detail.
  • Effective communication skills to collaborate with cross-functional teams.
  • Experience working on academic or industry projects involving SoC design and IP integration.
  • Passion for learning and contributing to advancements in semiconductor technology.

If you are eager to build a career in cutting-edge SoC design and want to be part of a collaborative, innovative, and dynamic environment, we encourage you to apply and join Intel in shaping the future of technology.

Job Type

College Grad

Shift:

Shift 1 (United States of America)

Primary Location:

US, California, Santa Clara

Additional Locations:

US, California, Folsom, US, Oregon, Hillsboro

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A

Benefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel .

Annual Salary Range for jobs which could be performed in the US: $105,650.00-149,150.00 USD

The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.

Work Model for this Role

This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.

*

ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment.

If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.

What you'll need to apply

Fields this application requires

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Company-specific questions

  • 1) * As of today's date, are you 18 years of age or older?
  • 2) * Are you a current or former employee of Ernst & Young?
  • 3) * Are you an immediate family member (parent, child, sibling, spouse/partner) of a partner at Ernst & Young who is based out of the San Jose, California office?
  • 4) * To the best of your knowledge and belief, are you aware of a contract or agreement with your current employer (or other company), such as a non-competition, non-disclosure, or non-solicitation agreement, that impact or interfere with your ability to work for the Company or communicate with former colleagues about working at the Company
  • 5) * Do you own, control, or have an economic interest in any intellectual property rights (patents, trademarks, or copyrights)?
  • 6) * If hired, do you intend to (select all that apply):
  • 7) * Are you a current employee of the US Department of Defense (DOD) or were you an employee of the US Department of Defense (DOD) on or after January 28, 2008?
  • 8) * Are you a current Federal, State or Local Government employee; including military (other than the DOD) or have you at any time in the past 5 years been an employee of one of these entities?
  • 11) * Do you now, or in the future, require Intel to sponsor you for a visa to work in the United States? NOTE: Individuals with work authorization issued pursuant to their student visa ( e.g., F-1, J-1, M-1 ) or currently on work visas specific to their current employer ( e.g., H-1B, O-1, TN, H-1B1, E-3 ), should answer “Yes” because Intel must file a visa petition on your behalf now or in the future. Intel immigration sponsorship refers to Intel filing employment-based visa and permanent resident applications on behalf of the employee in order for the individual to have the legal right to work in the U.S. Individuals with work authorization not dependent on Intel sponsorship should respond “No”, e.g., Family based immigration, DACA, TPS, PIP, & Asylum Applicant.

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