Network Systems and Solution Engineer
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Company-specific questions
- 1. Are you a current or former employee of Ernst & Young?
- 2. Are you an immediate family member (parent, child, sibling, spouse/partner) of a partner at Ernst & Young who is based out of the San Jose, California office?
- 3. Did you sign any non-competition or non-solicitation agreement with your current employer (or other company) that might impact or prevent you to work in any way for Intel?
- 4. Do you own, control or have an economic interest in any intellectual property right (patents, trademarks, or copyrights)?
- 5. If hired, do you intend to maintain any secondary non-Intel employment or engage in a non-Intel business activity? If yes, please note that such employment or activity may be subject to review and approval.
- 6. I understand and agree that any false information, misrepresentation, or omission of facts in this document or in any document I have completed or supplied regarding my application for employment will be considered as dishonest and deception, as such, justification for refusal to hire, or immediate termination of employment without recourse.
- 7. Are you legally entitled to work in the country/countries for which you are applying and can provide evidence?
- 8. Are you a government official who has worked or is working with Intel on government related business in the last twelve months or is reasonably likely to work with Intel in the next six months? Do you have any close relationship (such as a family member) with a government official who has worked or is working with Intel on government related business in the last twelve months or is reasonably likely to work with Intel in the next six months? If you answer Yes to one of the questions or both questions, respond Yes.
About this role
Employer-provided description, formatted for easier reading.
Job Details
Job Description:
The Customer Experience and Support (CES) team within CEG NSG group is looking for a talented senior Network Systems and Solutions Engineer to support Intel Ethernet products. The primary job role is technical enabling of Intel Ethernet product for both discrete Ethernet controller and integrated Ethernet IP on SOC.
This includes technical debug and issue resolution of complex issues on board design, system-level applications, PCIe interlink, and Ethernet interlink. The role is also expected to work independently on resolving customer issues and drive resolution as delivery. The role will be expected to collaborate software developer to accomplish debug tool development and validation.
Complex issue debug, problem solving, multi-tasking, organization, and customer management skills are critical to success in this role. Some travel may be required as appropriate based on customer needs.
Qualifications
Minimum Qualifications:
- Bachelor's or Master's Degree in Electrical Engineering along with minimum of 6 years of experience over similar area.
- Excellent written and verbal communications skills.
- Solid hardware design concepts and experience.
- Strong analytical skills for problem abstraction and resolution.
- Good understanding of high-speed IO debug methods preferably PCIe or Ethernet technologies (signal integrity, firmware debug, protocol analysis).
- Working knowledge of lab equipment including oscilloscope, network analyzer, spectrum analyzer, logical analyzer, protocol analyzer, etc.
- Self-motivated with the ability to work independently and deliver quality result.
Preferred Qualifications:
- Knowledge of PCIe building block on SerDes PHY layer, Data Link layer, Transaction Layer. Fluent on PCIe link issue debug including SerDes Equalization and LTSSM log analysis.
- Knowledge of Intel system level architecture BMC, NCSI, I2C, IOSF, I3C.
- Working knowledge of 10G/25G/40G/100G/200G/400G Ethernet media (Optical, DAC, Backplane), and proven experience on resolving Ethernet interlink issue.
- Working knowledge of Ethernet module manageability protocol including, SFF-8472, SFF-8636, CMIS 3.x/4.x/5.x
- Proven experience of supporting custom design and issue debug activities.
- Proven experience of product development, from hardware design to mass production.
- Proven experience of x86 Server platform design.
- Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research.
Job Type
Experienced Hire
Shift:
Shift 1 (Taiwan)
Primary Location:
Taiwan, Taipei
Additional Locations:
Posting Statement:
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
Position of Trust
N/A
Work Model for this Role
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.
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If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.