GPU Design Verification Engineer
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Fields this application requires
Company-specific questions
- 1. Are you a current or former employee of Ernst & Young?
- 2. Are you an immediate family member (parent, child, sibling, spouse/partner) of a partner at Ernst & Young who is based out of the San Jose, California office?
- 3. Did you sign any non-competition or non-solicitation agreement with your current employer (or other company) that might impact or prevent you to work in any way for Intel?
- 4. Do you own, control or have an economic interest in any intellectual property right (patents, trademarks, or copyrights)?
- 5. If hired, do you intend to maintain any secondary non-Intel employment or engage in a non-Intel business activity? If yes, please note that such employment or activity may be subject to review and approval.
- 6. I understand and agree that any false information, misrepresentation, or omission of facts in this document or in any document I have completed or supplied regarding my application for employment will be considered as dishonest and deception, as such, justification for refusal to hire, or immediate termination of employment without recourse.
- 7. Are you legally entitled to work in India for which you are applying and can provide evidence?
- 8. Are you a government official who has worked or is working with Intel on government related business in the last twelve months or is reasonably likely to work with Intel in the next six months? Do you have any close relationship (such as a family member) with a government official who has worked or is working with Intel on government related business in the last twelve months or is reasonably likely to work with Intel in the next six months? If you answer Yes to one of the questions or both questions, respond Yes.
About this role
Employer-provided description, formatted for easier reading.
Job Details
Job Description:
- Performs functional verification of graphics logic components, including 3D graphics, media, and display, to ensure design will meet specification requirements.
- Defines and develops scalable and reusable IP verification plans, test benches, and architecture for verification environment to ensure coverage to confirm to graphics microarchitecture specifications.
- Executes verification plans and defines and runs system simulation models to verify the design, analyze power and timing, and uncover bugs.
- Replicates, root causes, and debugs issues in the presilicon environment.
- Finds and implements corrective measures to resolve failing tests. Collaborates with GPU architects, RTL developers, and physical design teams to improve verification of complex architectural and microarchitectural features and to meet functional, performance, and power goals.
- Documents test plans and drives technical reviews of plans and proofs with design and architecture teams.
- Maintains and improves existing functional verification infrastructure and methodology. Participates in the definition of verification infrastructure and related TFMs needed for functional design verification.
Qualifications
- Bachelor / Masters degree in Electronics or Computer Engineering with 6+ years experience in silicon design development.
- Well versed with Verilog / System Verilog / UVM.
- Experience in Pre-silicon verification, Testplan, testbench, Coverage/Assertion writing and closure.
- Exposure to CPU or GPU Architecture (Computer Architecture Knowledge)Debug Experience with industry standard frontend design and verification flows, tools and methodology Programming / scripting languages like Python, Perl, or Shell scripting automation methods.
- Good verbal/written communication skills.
- Effective team player with continuous learning mindset.
- Be willing to balance multiple tasks. Prior experience in IP development teams would be an added advantage.
- Experience in IP coverage and functional verification.
Job Type
Experienced Hire
Shift:
Shift 1 (India)
Primary Location:
India, Bangalore
Additional Locations:
Posting Statement:
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
Position of Trust
N/A
Work Model for this Role
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.
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