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Intel· Spotted 4h ago

CPU Circuit Design Engineer

Location
US, Texas, Austin
Pay
$141,910 – $269,100 a year
Work mode
Hybrid
Employment
Full-time
Level
Senior
Experience
5+ years
Education
Bachelor's degree

Posted Nov 11, 2026Last confirmed open Nov 11, 2026

About this role

Job Details

Job Description:

The world is transforming - and so is Intel. Intel is a company of bold and curious inventors and problem solvers who create some of the most astounding technology advancements and experiences in the world.

With a legacy of relentless innovation and a commitment to bring smart, connected devices to every person on Earth, our diverse and brilliant teams are continually searching for tomorrow's technology and revel in the challenge that changing the world for the better brings. We work every single day to design and manufacture silicon products that empower people's digital lives. Come join us and do something wonderful.

The Role and Impact As a CPU Circuit Design Engineer, you will play a pivotal role in shaping the performance of Intel's cutting-edge CPUs. You will design, simulate, and optimize circuits to achieve the best trade-offs between speed, power, area, and reliability, ensuring that our products meet stringent quality and schedule demands.

Your contributions will directly impact the functionality and efficiency of Intel's leading technologies, driving innovation and delivering exceptional results.

Business Group At Intel Corporation, the Atom Circuit P2 team focuses on advancing circuit designs that enable next-generation CPU performance and innovation. This group plays a key role in developing technologies that power Intel's products, working collaboratively across domains to tackle complex design challenges.

The team's work supports Intel's broader commitment to delivering world-class silicon solutions that transform industries and improve lives.

Responsibilities

  • Drives performance verification (PV) methodology and circuit / timing quality signoff for the CPU team.
  • Evaluates new process nodes through circuit simulations and/or block scaling methods, recommends frequency targets for the CPU with an early understanding of u-architectural growth.
  • Makes informed trade-offs between performance, power, area, and effort.
  • Works with design domains RTL/circuit/SD to converge to timing targets with no compromise on quality or schedule.
  • In addition to pre-silicon responsibilities, this individual will grow to own pre-to-post silicon VF correlation and drive debug of circuit marginality sightings.
  • Must demonstrate a track record of execution and design ownership in advanced process technologies.

Qualifications

  • You must possess the below minimum qualifications to be initially considered for this position.
  • Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.
  • Experience listed below would be obtained through a combination of your degree, research and or relevant previous job and or internship experiences.

Minimum Qualifications

Bachelors & 6+ years or Masters & 4+ years in Electrical & Computer Engineering, Computer Engineering, Electrical Engineering or related field.

  • 5+ years of CPU circuit or backend design experience.
  • 5+ years of experience in circuit design and STA.

Preferred Qualifications

  • In-depth circuit design knowledge and ability to make PPA tradeoff decisions.
  • In-depth STA knowledge and circuit quality signoff criteria for tape-in.
  • Ability to guide debug of post-silicon circuit marginality sightings.
  • Ability to handle incomplete, fuzzy task definitions and drive them to closure.
  • Hands on individual contributor who can delegate when necessary to meet stringent schedules.
  • Led technical teams of 2-3 engineers.
  • Self-motivated, team player and easy to work with.

Join us in building world-class technology that transforms industries and enriches lives. Together, we can do something wonderful.

Job Type

Experienced Hire

Shift:

Shift 1 (United States of America)

Primary Location:

US, Texas, Austin

Additional Locations:

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A

Benefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel .

Annual Salary Range for jobs which could be performed in the US: $141,910.00-269,100.00 USD

The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.

*

ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment.

If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.

What you'll need to apply

Fields this application requires

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Company-specific questions

  • 1) * As of today's date, are you 18 years of age or older?
  • 2) * Are you a current or former employee of Ernst & Young?
  • 3) * Are you an immediate family member (parent, child, sibling, spouse/partner) of a partner at Ernst & Young who is based out of the San Jose, California office?
  • 4) * To the best of your knowledge and belief, are you aware of a contract or agreement with your current employer (or other company), such as a non-competition, non-disclosure, or non-solicitation agreement, that impact or interfere with your ability to work for the Company or communicate with former colleagues about working at the Company
  • 5) * Do you own, control, or have an economic interest in any intellectual property rights (patents, trademarks, or copyrights)?
  • 6) * If hired, do you intend to (select all that apply):
  • 7) * Are you a current employee of the US Department of Defense (DOD) or were you an employee of the US Department of Defense (DOD) on or after January 28, 2008?
  • 8) * Are you a current Federal, State or Local Government employee; including military (other than the DOD) or have you at any time in the past 5 years been an employee of one of these entities?
  • 11) * Do you now, or in the future, require Intel to sponsor you for a visa to work in the United States? NOTE: Individuals with work authorization issued pursuant to their student visa ( e.g., F-1, J-1, M-1 ) or currently on work visas specific to their current employer ( e.g., H-1B, O-1, TN, H-1B1, E-3 ), should answer “Yes” because Intel must file a visa petition on your behalf now or in the future. Intel immigration sponsorship refers to Intel filing employment-based visa and permanent resident applications on behalf of the employee in order for the individual to have the legal right to work in the U.S. Individuals with work authorization not dependent on Intel sponsorship should respond “No”, e.g., Family based immigration, DACA, TPS, PIP, & Asylum Applicant.

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