DFT Engineering Technical Lead || ATPG, SCAN, JTAG, MBIST, TestMax, Tessent || Exp - 10+ years

Join our team as a DFT Engineering Technical Lead, driving the implementation of Hardware Design-for-Test features for advanced networking hardware. Lead innovation in DFT IP development and collaborate with cross-functional teams to integrate testability. Ideal for experienced engineers with deep expertise in DFT, test, and silicon engineering.