ASIC DFT Engineer || MBIST, SCAN, ATPG, JTAG || Exp 4 to 8 years

We are looking for an ASIC DFT Engineer to implement hardware design-for-test features supporting ATE, in-system test, and diagnostics. You will develop innovative DFT IP and collaborate with multi-functional teams. Ideal candidates have significant experience in DFT, test, and silicon engineering.