Back to jobs

ASIC Design Verification Engineer

Cisco · Taipei, New Taipei, Taiwan

Spotted 9h agoFull-time

Job details

Employment
Full-time
Posted
Oct 20, 2026
Last confirmed open
Oct 20, 2026
Job description

About this role

We are expanding our team: As an ASIC Design Verification Engineer, you will play a key role in developing and verifying complex ASICs for next-generation switching systems. You will design and enhance testbenches, collaborate with design and hardware teams, and contribute to verification infrastructure. Ideal candidates have significant ASIC verification experience and expertise in System Verilog and UVM.

Interested in this role?Continue on Cisco's careers page.
Apply on Cisco