System Architect

Principal Systems Architect, Optical Substrate RoadmapWhy this role exists 3D Glass Solutions (3DGS) needs one senior systems architect to own where our glass-core substrate and waveguide roadmap goes, and why. Optics is moving off the faceplate and into the package. The industry is moving from pluggables to on-board optics (OBO), near-packaged optics (NPO) and co-packaged optics (CPO).

That shift starts in switch ASICs and spreads to XPUs, where scale-up optical I/O is becoming a real requirement. Every step in that shift makes the substrate part of the optical system. Fiber counts per package rise into the hundreds and thousands.

The fiber-to-PIC interface becomes the limit on yield, cost and serviceability. Large-body packages push organic cores past their limits on warpage, power delivery and 224G-class signal integrity. 3DGS builds glass-core substrates in Albuquerque, New Mexico, with through-glass vias (TGVs), fine-line redistribution and ion-exchange optical waveguides in one platform.

This person will turn system-level needs at switch, XPU and hyperscaler customers into a substrate and waveguide roadmap we can build, sell and defend.

The role

The Principal Systems Architect, Optical Substrate Roadmap is our technical voice to customers and the owner of our product and technology roadmap for optical-enabled substrates. The role is half outward-facing and half inward-facing. Outward, you sit with switch, XPU, optics and hyperscaler architects and learn what their 2028–2032 packages must do.

Inward, you turn that into specifications, roadmap gates and investment priorities for our process, design and fab teams. You report directly to the CEO and work closely with engineering, process development, business development and our India subsidiary. This is an individual-contributor role with significant influence; it may grow into a CTO-office or product-line leadership role.

Key responsibilities

Customer and ecosystem engagement

• Lead technical discussions with system architects at switch silicon vendors, custom-XPU and AI accelerator companies, optical engine and transceiver makers, hyperscalers, OSATs and foundry packaging teams.
• Find out what each customer is solving for. That includes fiber count, shoreline bandwidth density, pJ/bit targets, serviceability, thermal limits, package body size and qualification timing.
• Represent 3DGS in technical forums and standards and multi-source agreement work relevant to CPO, NPO and optical I/O, such as OIF, COBO, OCP and IEEE.

System-level requirements and architecture

• Turn system needs into substrate requirements across four use cases: on-board optics, NPO, CPO switches, and XPU optical I/O for scale-up and scale-out.
• Define the optical interface stack. That covers PIC-to-waveguide coupling (evanescent, adiabatic, edge), waveguide routing and loss budgets, mode conversion to single-mode fiber, and detachable fiber connectors at the package edge.
• Co-optimize optical, electrical, power and thermal needs in one package. That includes 200G/lane-class SerDes channels, TGV-based power delivery, CTE matching for alignment stability, warpage and large-body reliability.
• Build system-level link budgets and trade studies comparing glass waveguides with competing approaches (polymer waveguides, direct fiber-array attach, silicon-photonics stacking).

Roadmap and technology strategy

• Own the 3–7 year substrate and waveguide roadmap, with clear generations, performance targets and decision gates.
• Prioritize what we develop, partner for or license, and where we will not compete.
• Track competitors, standards and customer architectures, and update the roadmap at least twice a year.
• Support IP strategy by spotting patentable architectures and defensive gaps.

Internal translation

• Write product requirement documents and test-vehicle definitions that process, design and reliability teams can execute against.
• Define the demonstrator and qualification plan that turns customer interest into design-ins.
• Support business development with technical content for customer proposals, investor materials and partnership negotiations.

Required qualifications

• MS or PhD in electrical engineering, optics/photonics, physics or a related field.
• 15+ years in high-speed interconnect, optical communications or advanced packaging. At least 5 of those years must be in system architecture, product definition or a customer-facing technical role.
• Hands-on depth in silicon photonics or optical transceivers. That means coupling, loss budgets, fiber attach and how optical engines are built, tested and qualified.
• Working knowledge of advanced packaging: 2.5D/3D integration, FC-BGA substrates, interposers and bridges, and the electrical, thermal and reliability limits of large-body packages.
• A track record of defining a product or roadmap that reached customers. You must be able to name what you defined, who adopted it and what changed.
• Credibility with senior architects at major semiconductor and hyperscaler companies, and an existing network there.

Clear technical writing and the ability to present a roadmap to customers, a board or investors