Hardware Systems Engineer

Apple · Cupertino

Spotted 1h ago

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About this role

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Imagine what you can do here. Apple is a place where extraordinary people gather to do their lives best work. Together we create products and experiences people once couldn't have imagined, and now, can't imagine living without.

It's the diversity of those people and their ideas that inspires the innovation that runs through everything we do.

APPLE INC has the following available in Cupertino, California and various unanticipated locations throughout the USA. Support system-level SerDes compliance and high-speed IO validation efforts that Mac System Technology is responsible for executing across all Mac programs. Support the end-to-end compliance process for all portable and desktop programs.

Contribute to the flow bring, validation and correlation. Perform debugging in collaboration with Hardware and System teams to drive silicon, hardware, and tunable issues for USB-C interface. Perform PHY adaptation validation with different channel scenarios to verify platform level integration robustness of these 3rd party and Apple IPs.

Perform hardware-level validation as well as simulation efforts to correlation with hardware validation. 40 hours/week. At Apple, base pay is one part of our total compensation package and is determined within a range.

This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $184,700 - $277,600/yr and your base pay will depend on your skills, qualifications, experience, and location.

PAY & BENEFITS

  • Apple employees also have the opportunity to become an Apple shareholder through participation in Apple’s discretionary employee stock programs.
  • Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple’s Employee Stock Purchase Plan.

You’ll also receive benefits including

  • Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses — including tuition.
  • Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation.
  • Learn more about Apple Benefits: https://www.
  • apple.
  • com/careers/us/benefits.
  • html.

Note

Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.

Master’s degree or foreign equivalent in Electrical Engineering or related field and 3 years of experience in the job offered or related occupation. 3 years of experience with each of the following skills is required:

Utilizing high-speed oscilloscopes, Signal generators and VNA/PNA to measure and analyze serial I/O signal integrity and electrical performance characteristics for receiver and transmitter validation Utilizing Thunderbolt and USB4 electrical compliance test specifications (CTS) and compliance test suites to execute and document high-speed serial I/O electrical compliance validation against industry standards Designing and implementing stress testing methodologies for high-speed serial I/O interfaces to identify design operating limits and receiver/transmitter margin post-system integration Executing SerDes receiver electrical validation including adaptive equalization characterization, clock recovery analysis, jitter measurement, and eye-diagram quality assessment Utilizing Python, C++ scripting languages to develop automation scripts for compliance test execution, high-volume eye-scan data collection, and factory-level test flow development Performing failure analysis and hardware debug to troubleshoot compliance test hardware, fixtures, software, and Device Under Test (DUT) issues affecting SerDes receiver/transmitter electrical performance Executing SerDes transmitter electrical validation including pre-emphasis tuning, output swing characterization, jitter analysis, and electrical compliance testing for high-speed data interfaces Characterizing SerDes PHY receiver and transmitter blocks with register-level programming for system validation configuration, including signal integrity parameter optimization and margin analysis Performing high-speed electrical calibration per CTS and verification of high-speed test equipment including 40GHz+ oscilloscopes and BERT systems to ensure measurement accuracy and traceability Utilizing advanced high-speed probing techniques to measure differential impedance, jitter, insertion loss, return loss, and eye-diagram metrics for high-speed serial interfaces

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